This patch add support for lcdif backlight on Is.IoT MX6UL
variant boards.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This patch add support for lcdif backlight on GEAM6UL
variant boards.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This adds support for the Zodiac Inflight Innovations RDU2 board,
which has both a Quad and a QuadPlus variant.

The board supports different panels, with the bootloader patching
in the correct compatible, depending on the hardware configuration.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add the DT nodes for the Prefetch Resolve Gaskets found on i.MX6QP
and hook them up to the assigned IPU nodes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add the DT nodes for the Prefetch Resolve Engines found on i.MX6QP.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

dtc recently added PCI bus checks. Fix these warnings.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The pinfunc definitions are ordered by mux_reg and so automatically by
conf_reg, too. PAD_TDO is the only pad that has a conf_reg but no
mux_reg. Put it to the place where it its in the order of conf_regs
instead of the top.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This was introduced in commit 18e2b504 ("ARM: dts: imx25-pinfunc:
more defines").
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The Gateworks Ventana GW5904 is a single-board computer based on the NXP
IMX6 SoC with the following features:
 * IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q)
 * 2048MB DDR3 DRAM (4x64bit) (options up to 4GiB)
 * 8GB eMMC
 * Gateworks System Controller:
  - hardware watchdog
  - hardware monitor
  - pushbutton controller
  - EEPROM storage
  - power control
 * JTAG programmable
 * 1x miniPCIe socket (with PCIe, USB)
 * 1x miniPCIe socket (USB)
 * 1x M.2 socket (USB, 2x SIM)
 * Inertial Module (LSM9DS1 9DOF: 3x acc, 3x rate, 3x mag)
 * GPS (optional uBlox EVA-M8M)
 * Application headers:
  - 2x RS232 UART (TX/RX/CTS/RTS)
  - 8x TTL GPIO (3x configurable as PWM)
  - 1x LVDS display 3D+C with i2c touch and PWM backlight
 * MV88E6176 GbE Switch (uplink to IMX FEC)
 * Front panel connectors:
  - 1x user programmable LED
  - 1x configurable user pushbutton
  - 1x USB OTG
  - 4x GbE LAN
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

System Reset Controller in i.MX7 doesn't have any commonality with IP
block found in i.MX5 and i.MX6 SoC families. Given that and the new
upstream driver for i.MX7 variant (see
https://lkml.org/lkml/2017/2/21/466) remove "fsl,imx51-src" from
compatibility string.

Cc: yurovsky@gmail.com
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add LVDS display support for OpenFrame Capacitive touch 7 inc
display which is supported by Engicam i.CoreM6 QDL Starter Kit.

Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus
openframe display carriers" which are good solution for develop
user friendly graphic user interface.

General features:
CPU           NXP i.MX6Q rev1.2 at 792 MHz
RAM           1GB, 32, 64 bit, DDR3-800/1066
NAND          SLC,512MB
LVDS Display  TFT 12.3" industrial, 1280x480 resolution
Backlight     LED backlight, brightness 350 Cd/m2
Power supply  15 to 30 Vdc

Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

i.CoreM6 Quad/Dual OpenFrame modules are "system on modules plus
openframe display carriers" which are good solution for develop
user friendly graphic user interface.

General features:
CPU           NXP i.MX6Q rev1.2 at 792 MHz
RAM           1GB, 32, 64 bit, DDR3-800/1066
NAND          SLC,512MB
LVDS Display  TFT 10.1" industrial, 1280x800 resolution
Backlight     LED backlight, brightness 350 Cd/m2
Power supply  15 to 30 Vdc

Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This patch add support for lvds backlight on i.CoreM6 QDL
variant boards.

Cc: Domenico Acri <domenico.acri@engicam.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Configures the megachips-stdpxxxx-ge-b850v3-fw bridges on the GE
B850v3 dts file.

Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Martyn Welch <martyn.welch@collabora.co.uk>
Cc: Martin Donnelly <martin.donnelly@ge.com>
Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Peter Senna Tschudin <peter.senna@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The imx7d-sdb has a mickro bus connector that can be connected to a
Sensirion SHT11 click board (temperature and humidity sensor):

https://shop.mikroe.com/click/sensors/sht1x

Add a new device tree file to describe such hardware.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The PHYs embedded in the switch direct there interrupts through the
switch interrupt controllers. Now that devel C has its switch
interrupts connected to the SoC, the PHY interrupts can be used by
phylib. Explicitly include MDIO nodes in the switch device tree nodes,
and link the PHY interrupts back to the switch interrupt
controller. Also, link the ports to the PHYs on the MDIO bus.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The devel B and devel C board use the same GPIO lines for interrupts
from the two switches. Move the pinmux nodes from devel B into the
shared .dtsi file, and wire up the interrupts on devel C.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

UART on i.MX6SX (like all other i.MX6 SoC variants) has the same
programming model as the 'imx6q-uart' type, so add it to the compatible
UART string.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Change the maxium spi clock frequency from 20MHz to 10MHz to meet the
operation voltage range requirement recommended in AT25 datasheet.
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

According to the reference manuals, both imx50/imx53 SOC seem to share
the same eSDHC controller, especially the section on "Multi-block Read"
mentioned in commit 361b8482 ("mmc: sdhci-esdhc-imx: fix multiblock
reads on i.MX53") is identical for both SOC.
Hence, let imx50 use imx53-esdhc.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Enable ocotp for i.mx7D/S.
Correct the clock entry and compatible string.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Reference them by handle and remove the changed clocks that are copied
from the downstream DT and are not part of the mainline binding.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Referencing the node by handle make the QP DT more resilent against
changes of the base DT. Also remove the duplicated reg property, it's
not needed as it the same as in the base DT, just the compatible is
actually different.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

By using the handle, we can avoid some duplication of the base DT
and so avoid any maintenance overhead in the QP DT if the referenced
node changes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

All currently supported i.MX25-based machines use phy_type = "utmi" and
dr_mode = "otg".  So this seems to be a sensible default.

This also doesn't hurt out-of-tree machines because up to now they had
to specify these two properties in the machine.dts which still takes
precedence by just overwriting the defaults added here.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This machine is based on I2SE's Duckbill 2 board and is sold as part
of I2SE's PLC Bundle for IoT. This is a development kit for Homeplug
Green PHY based powerline products based on Qualcomms QCA7000 chip.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This machine is based on I2SE's Duckbill 2 board and features a
EnOcean daugther board based on the popular TCM310 chipset.
This product is intended to be used for e.g. home automation purposes.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This machine is based on I2SE's Duckbill 2 board and features a
RS-485 daugther board. This device is intended to be used for
e.g. home automation purposes.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This machine is an USB pen drive sized development board,
based on NXP's i.MX28 CPU. In contrast to the previous
model "Duckbill", the "Duckbill 2" series has internal
eMMC storage.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This patch adds the missing devicetree binding documentation for I2SE's
Duckbill and Duckbill 2 series boards.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This patch updates the Duckbill device tree and synchronize it with
the vendor distributed file. The changes in mostly pin-muxing stuff,
but also some minor fixes. In detail:
- enable SPI pins
- enable I2C pins
- enable UART pins
- enable LRADC pin
- adjust USB DR mode
- add default triggers for LEDs
- get rid of regulators simple-bus container
- adjust phy reset duration
  According to phy datasheet, 25ms are sufficient. This also reduces
  the time to boot the system.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This patch renames mmc2_sck_cfg in order to prepare for an alternative
muxing setup.
Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Michael Heimpold <michael.heimpold@i2se.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Quoting Philipp Zabel:
"Since this regulator is used as the TVDAC analog power supply, this
range should at least be limited to the analog power supply range of the
TVDAC, listed in Table 74-9. of the i.MX53 reference manual (2.5-2.75V).

But since the nominal voltage is 2.75V, which was used to determine the
analog gain that is supposed to result in the necessary 0.7V
peak-to-peak amplitude on the VGA output, I'd say we should just fix the
voltage to 2750000 here."

, so limit the TVDAC analog power supply as suggested.
Suggested-by: Lucas Stach <l.stach@pengutronix.de>
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

imx6ul.dtsi already contains:

cpu0: cpu@0 {
	....
	arm-supply = <&reg_arm>;
	soc-supply = <&reg_soc>;
};

, so remove the duplication.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The cm-fx6 module has an onboard Wolfson wm8731 codec which is muxed
to the ssi2 controller. Unlike most (all?) supported i.MX6 board/codec
combinations the wm8731 is operated in slave mode and the clock setup
is static.

Add support for it.
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
[christopher.spinrath@rwth-aachen.de: enhanced commit message, ported
  to upstream and some cleanup]
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Leave pca953x P06,P07 pins on b850v3 platform and P06 pin on
b450v3/b650v3 unconfigured in the kernel space since they could be
configured as DP1_RST and DP2_RST by the applications for the DP FW
update support.
Signed-off-by: Ken Lin <ken.lin@advantech.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>