- 22 Nov, 2021 29 commits
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Mark Brown authored
Merge series from Daniel Baluta <daniel.baluta@oss.nxp.com>: This patch series adds support for System PM and Runtime PM with SOF for i.MX8 platforms.
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Mark Brown authored
Merge series from Olivier Moysan <olivier.moysan@foss.st.com>: Enable support of pm runtime on STM32 SPDIFRX, I2S and DFSDM drivers to allow power state monitoring.
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Mark Brown authored
Merge series from Ariel D'Alessandro <ariel.dalessandro@collabora.com>: This patchset modifies the tlv320aic31xx driver to update its sysclk if BCLK is used as the input clock. This allows to be used by the generic fsl-asoc-card, without having to add a specific driver.
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Mark Brown authored
Merge series from Kai Vehmanen <kai.vehmanen@linux.intel.com>: When a pipeline is marked dynamic in the SOF DSP firmware topology definition (the tplg file kernel loads from filesystem), it means the pipeline resources are not allocated when DSP is booted (at driver probe, or at runtime resume), but rather delayed until the pipeline is actually used.
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Ariel D'Alessandro authored
Add entry for fsl,imx-audio-tlv320aic31xx audio codec. This codec is configured to use BCLK as clock input. Signed-off-by:
Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by:
Ariel D'Alessandro <ariel.dalessandro@collabora.com> Link: https://lore.kernel.org/r/20211119153248.419802-6-ariel.dalessandro@collabora.comSigned-off-by:
Mark Brown <broonie@kernel.org>
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Ariel D'Alessandro authored
If BCLK is used as PLL input, the sysclk is determined by the hw params. So it must be updated here to match the input frequency, based on sample rate, format and channels. Signed-off-by:
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Ariel D'Alessandro authored
Add divisors for rates needed when the clk_in is set to BCLK. Signed-off-by:
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Ariel D'Alessandro authored
When the clock used by the codec is BCLK, the operation parameters need to be calculated from input sample rate and format. Low frequency rates required different r multipliers, in order to achieve a higher PLL output frequency. Signed-off-by:
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Ariel D'Alessandro authored
Signed-off-by:
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Richard Fitzgerald authored
When a jack handler is registered in cs42l42_set_jack() the initial state should be reported if an attached headphone/headset has already been detected. The jack detect sequence takes around 1 second: typically long enough for the machine driver to probe and register the jack handler in time to receive the first report from the interrupt handler. So it is possible on some systems that the correct initial state was seen simply because of lucky timing. Modular builds were more likely to miss the reporting of the initial state. Signed-off-by:
Richard Fitzgerald <rf@opensource.cirrus.com> Fixes: 4ca239f3 ("ASoC: cs42l42: Always enable TS_PLUG and TS_UNPLUG interrupts") Link: https://lore.kernel.org/r/20211119124854.58939-1-rf@opensource.cirrus.comSigned-off-by:
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Pierre-Louis Bossart authored
There are already 3 versions of the Up boards with support for the SOF community key (ApolloLake, WhiskyLake, TigerLake). Rather than continue to add quirks for each version, let's add a wildcard. For WHL and TGL, the authentication supports both the SOF community key and the firmware signed with the Intel production key. Given two choices, the community key is the preferred option to allow developers to sign their own firmware. The firmware signed with production key can still be selected if needed with a kernel module option (snd-sof-pci.fw_path="intel/sof") Tested-by:
Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Signed-off-by:
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by:
Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by:
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Olivier Moysan authored
Enable support of pm_runtime on STM32 SPDIFRX driver to allow SPDIFRX power state monitoring. Signed-off-by:
Olivier Moysan <olivier.moysan@foss.st.com> Link: https://lore.kernel.org/r/20211119104752.13564-4-olivier.moysan@foss.st.comSigned-off-by:
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Olivier Moysan authored
Enable support of pm_runtime on STM32 DFSDM audio driver to allow power state monitoring. Signed-off-by:
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Olivier Moysan authored
Enable support of pm_runtime on STM32 I2S driver to allow I2S power state monitoring. Signed-off-by:
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Ranjani Sridharan authored
To keep the widget use_counts balanced, free the DAI widget during suspend and also during the stop trigger. Signed-off-by:
Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by:
Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> Reviewed-by:
Kai Vehmanen <kai.vehmanen@linux.intel.com> Link: https://lore.kernel.org/r/20211119192621.4096077-11-kai.vehmanen@linux.intel.comSigned-off-by:
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Ranjani Sridharan authored
This patch adds support for dynamic pipelines with multi-core by using the platform-specific core_get/put() ops to power up/down a core when a widget is set up/freed. Along with this, a few redundant functions are removed: 1. sof_pipeline_core_enable() is no longer needed as the pipeline core will be set up when the pipeline widget is set up 2. sof_core_enable() is replaced with snd_sof_core_get() 4. core_power_up/down() DSP ops are deprecated and replaced with core get/put ops. 5. Core power down in sof_widget_unload() during topology removal is also removed as it is not really needed. For dynamic pipelines, the cores will be powered off when they are not used. For static pipelines, the cores will be powered off in the device remove callback. Signed-off-by:
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Ranjani Sridharan authored
The core_power_up/down() ops will be deprecated. Use the HDA platform-specific functions for powering up/down the cores during probe/suspend/remove. The enabled_cores_mask and the core ref_count's are manually updated in each of these functions. Signed-off-by:
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Ranjani Sridharan authored
Free widgets for static pipelines in sof_tear_down_pipelines(). But this feature is unavailable in older firmware with ABI < 3.19. Just reset widget use_count's for this case. This would ensure that the secondary cores enabled required for topology setup are powered down properly before the primary core is powered off during system suspend. Signed-off-by:
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Ranjani Sridharan authored
Remove the function sof_load_pipeline_ipc() and directly send the IPC instead. The pipeline core is already enabled with the call to sof_pipeline_core_enable() in sof_widget_setup(). Signed-off-by:
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Ranjani Sridharan authored
Set core_get/put ops for CNL/ICL platforms. These platforms do not support enabling/disabling secondary cores dynamically. So skip sending the IPC to power off the cores in the core_put op. Signed-off-by:
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Ranjani Sridharan authored
Set core_get/put() ops for TGL. When core_get() is requested for a core, its ref_count is incremented and the PM_CORE_ENABLE IPC sent to the firmware to power up the core if the current ref_count is 1. Conversely, the ref_count is decremented in core_put() and an IPC is sent to the DSP to power off the core if the ref_count is 0. Signed-off-by:
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Ranjani Sridharan authored
Add ops to get/put a core that will be used to power up/down a core along with incrementing/decrementing its ref_count. Signed-off-by:
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Ranjani Sridharan authored
Add two fields num_cores and dsp_cores_ref_count to struct snd_sof_dev. These will be used to maintain the ref count for each core to determine when it should be powered up or down. Signed-off-by:
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Ranjani Sridharan authored
expose get_chip_info(). Signed-off-by:
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Daniel Baluta authored
Resume common flow (System PM / Runtime PM) is like this: sof_resume -> specific device resume -> snd_sof_load_firmware -> snd_sof_dsp_reset (1) -> load_modules() -> snd_sof_run_firmware (2) We need to implement dsp_reset callback (1) that will actually reset the DSP but keep it stalled. In order to implement this we do the following: -> put DSP into reset (assert CoreReset bit from PWRCTL) -> stall the DSP using RunStall bit from AudioDSP_REG2 mix -> take DSP out of reset (de-assert CoreReset bit from PWRCTL) At this moment the DSP is taken out of reset and Stalled! This means that we can load the firmware and then start the DSP (2). Until now we resetted the DSP by turning down the Audiomix PD. This doesn't work for Runtime PM if another IP is keeping Audiomix PD up. By introducing dsp_reset() we no longer rely on turning off the audiomix to reset the DSP. Signed-off-by:Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by:
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Daniel Baluta authored
On i.MX8M DSP is controlled via a set of registers from Audio MIX. This patches gets a reference (via regmap) to Audio Mix registers and implements DSP start. Signed-off-by:
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Daniel Baluta authored
We make use of common imx8m_suspend / imx8m_resume functions for both system PM and runtime PM. imx8m_suspend: - frees the MU channels - disables the clocks imx8m_resume - enables the clocks - requests the MU channels On i.MX8MP there is no dedicated functionality to put the DSP in reset. The only way of doing this is to POWER DOWN the Audiomix domain. We are able to do this because turning off the clocks and freeing the channels makes the Audiomix to have no users thus PM kernel core turns it down. SOF core will not call system PM suspend handler if the DSP is already down, but at resume it will call the system PM resume. So, we need to keep track of the state via snd_sof_dsp_set_power_state Few insights on how SOF core handles the PM: - SOF core uses PM runtime autosuspend (with a timeout of 2 secs) - at probe, SOF core boots the DSP and lets the PM runtime suspend to turn it off, if there is no activity - when someone opens the ALSA sound card (aplay/arecord, etc) ALSA core calls PM runtime resume to turn on the DSP - when the ALSA sound card is closed SOF core make use of PM subsystem to call PM runtime suspend and thus turning off the DSP. Signed-off-by:
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Daniel Baluta authored
Handle clocks and mailbox channels at runtime suspend/resume in order to save power. DSP runtime PM uses a timeout of 2s. If device is idle for 2s system will enter runtime suspend. Because SOF state machine assumes that even if the DSP wasn't previously active at a System resume, will re-load the firmware we need to make sure that all needed resources are active. Kernel core will take care of enabling the PD, we need to make sure that we request the MU channels. Signed-off-by:
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Daniel Baluta authored
We need at least 3 clocks in order to power up and access DSP core registers found on i.MX8QM, i.MX8QXP and i.MX8MP platforms. Add code to request these clocks and enable them at probe. Next patches will add PM support which will only activate clocks when DSP is used. DSP clocks are already documented in Documentation/devicetree/bindings/dsp/fsl,dsp.yaml We choose to add: * imx8_parse_clocks * imx8_enable_clocks * imx8_disable_clocks wrappers because in the future DSP will need to take care about the clocks of other related Audio IPs (e.g SAI, ESAI). Signed-off-by:
Paul Olaru <paul.olaru@oss.nxp.com> Reviewed-by:
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- 18 Nov, 2021 10 commits
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Mark Brown authored
Merge series from Daniel Baluta <daniel.baluta@oss.nxp.com>: This adds sound open firmware driver support for MT8915 platform.
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Srinivasa Rao Mandadapu authored
Remove redundant conditional check and clean code in special headset support functions. Signed-off-by:
Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Co-developed-by:
Venkata Prasad Potturu <potturu@codeaurora.org> Signed-off-by:
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YC Hung authored
Add DSP system PM callback for suspend and resume Signed-off-by:
YC Hung <yc.hung@mediatek.com> Reviewed-by:
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YC Hung authored
Add adsp clock on/off support on mt8195 platform. Signed-off-by:
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YC Hung authored
Add dsp ops callback to register AFE DL2/DL3/UL4/UL5 sof dai's with ALSA Signed-off-by:
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YC Hung authored
Add SOF device and DT descriptor for Mediatek mt8195 platform. Signed-off-by:
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YC Hung authored
Add mt8195-loader module with ops callback to load and run firmware on mt8195 platform. Signed-off-by:
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YC Hung authored
Add new sof dai and config to pass topology file configuration to SOF firmware running on Mediatek platform DSP core. Add mediatek audio front end(AFE) to the list of supported sof_dais Signed-off-by:
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YC Hung authored
Add the definition for Mediatek audio front end(AFE) tokens,include AFE sampling rate, channels, and format. Signed-off-by:
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YC Hung authored
This patch initialize to support SOF on Mediatek mt8195 platform. MT8195 has four Cortex A78 cores paired with four Cortex A55 cores. It also has Cadence HiFi-4 DSP single core. There are shared DRAM and mailbox interrupt between AP and DSP to use for IPC communication. Signed-off-by:
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- 17 Nov, 2021 1 commit
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Mark Brown authored
Merge series from Daniel Baluta <daniel.baluta@oss.nxp.com>: This patchseries adds AMD Renoir ACP HW support.
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