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  1. 29 Sep, 2023 1 commit
  3. 28 Sep, 2023 4 commits
  5. 27 Sep, 2023 14 commits
  7. 26 Sep, 2023 2 commits
  9. 25 Sep, 2023 2 commits
  11. 24 Sep, 2023 4 commits
    • Liu Ying's avatar
      arm64: dts: imx8mm-evk: Fix hdmi@3d node · efa97aed
      Liu Ying authored 
      The hdmi@3d node's compatible string is "adi,adv7535" instead of
"adi,adv7533" or "adi,adv751*".

Fix the hdmi@3d node by means of:
* Use default register addresses for "cec", "edid" and "packet", because
  there is no need to use a non-default address map.
* Add missing interrupt related properties.
* Drop "adi,input-*" properties which are only valid for adv751*.
* Add VDDEXT_3V3 fixed regulator
* Add "*-supply" properties, since most are required.
* Fix label names - s/adv7533/adv7535/.

Fixes: a27335b3 ("arm64: dts: imx8mm-evk: Add HDMI support")
Signed-off-by: default avatarLiu Ying <victor.liu@nxp.com>
Tested-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
      efa97aed
    • Nathan Rossi's avatar
      soc: imx8m: Enable OCOTP clock for imx8mm before reading registers · 9d1e8275
      Nathan Rossi authored 
      Commit 836fb309 ("soc: imx8m: Enable OCOTP clock before reading the
register") added configuration to enable the OCOTP clock before
attempting to read from the associated registers.

This same kexec issue is present with the imx8m SoCs that use the
imx8mm_soc_uid function (e.g. imx8mp). This requires the imx8mm_soc_uid
function to configure the OCOTP clock before accessing the associated
registers. This change implements the same clock enable functionality
that is present in the imx8mq_soc_revision function for the
imx8mm_soc_uid function.
Signed-off-by: default avatarNathan Rossi <nathan.rossi@digi.com>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Fixes: 836fb309 ("soc: imx8m: Enable OCOTP clock before reading the register")
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
      9d1e8275
    • Adam Ford's avatar
      arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock · 161af16c
      Adam Ford authored 
      Commit 16c98452 ("arm64: dts: imx8mp: don't initialize audio clocks
from CCM node") removed the Audio clocks from the main clock node, because
the intent is to force people to setup the audio PLL clocks per board
instead of having a common set of rates since not all boards may use
the various audio PLL clocks for audio devices.

This resulted in an incorrect clock rate when attempting to playback
audio, since the AUDIO_PLL2 wasn't set any longer. Fix this by
setting the AUDIO_PLL2 rate inside the SAI3 node since it's the SAI3
that needs it.

Fixes: 16c98452 ("arm64: dts: imx8mp: don't initialize audio clocks from CCM node")
Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
      161af16c
    • Adam Ford's avatar
      arm64: dts: imx8mp: Fix SDMA2/3 clocks · b739681b
      Adam Ford authored 
      Commit 16c98452 ("arm64: dts: imx8mp: don't initialize audio clocks
from CCM node") removed the Audio clocks from the main clock node, because
the intent is to force people to setup the audio PLL clocks per board
instead of having a common set of rates, since not all boards may use
the various audio PLL clocks in the same way.

Unfortunately, with this parenting removed, the SDMA2 and SDMA3
clocks were slowed to 24MHz because the SDMA2/3 clocks are controlled
via the audio_blk_ctrl which is clocked from IMX8MP_CLK_AUDIO_ROOT,
and that clock is enabled by pgc_audio.

Per the TRM, "The SDMA2/3 target frequency is 400MHz IPG and 400MHz
AHB, always 1:1 mode, to make sure there is enough throughput for all
the audio use cases."

Instead of cluttering the clock node, place the clock rate and parent
information into the pgc_audio node.

With the parenting and clock rates restored for  IMX8MP_CLK_AUDIO_AHB,
and IMX8MP_CLK_AUDIO_AXI_SRC, it appears the SDMA2 and SDMA3 run at
400MHz again.

Fixes: 16c98452 ("arm64: dts: imx8mp: don't initialize audio clocks from CCM node")
Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
      b739681b
  13. 20 Sep, 2023 1 commit
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