- 20 Sep, 2023 40 commits
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Markuss Broks authored
J5 and J5X have ST LIS2HH12 accelerometer. Add support for it. Signed-off-by:
Markuss Broks <markuss.broks@gmail.com> Co-developed-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230904123123.2593-1-linmengbo0689@protonmail.comSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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Neil Armstrong authored
The second PMR735D PMIC is not always presend on SM8550 based devices, split the pmr735d.dtsi file in two so boards files can only include the ones present on the platform. Suggested-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230831-topic-sm8550-upstream-pmr735d-split-v1-1-98e632636415@linaro.orgSigned-off-by:
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Varadarajan Narayanan authored
Enable USB2 in host mode. Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/d4c20505dd2103b5421eab7602aec4f83bd62dbe.1693468292.git.quic_varada@quicinc.comSigned-off-by:
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Varadarajan Narayanan authored
Add USB phy and controller nodes. Signed-off-by:
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Krzysztof Kozlowski authored
This reverts commit 413821b7 because it was never reviewed, was buggy (report from kernel test robot: https://lore.kernel.org/all/202204090333.QZXMI2tu-lkp@intel.com/) and used undocumented, broken bindings. Half of the properties in this device are questioned, thus adding DTS node causes only errors and does not make the device usable without the bindings and driver part: sm7225-fairphone-fp4.dtb: haptics@5a: failed to match any schema with compatible: ['awinic,aw8695'] sm7225-fairphone-fp4.dtb: haptics@5a: awinic,tset: b'\x12' is not of type 'object', 'array', 'boolean', 'null' sm7225-fairphone-fp4.dtb: haptics@5a: awinic,r-spare: b'h' is not of type 'object', 'array', 'boolean', 'null' Since bindings were abandoned (4 months since review), revert the commit to avoid false sense of supporting something which is not supported. Cc: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20230827122842.63741-3-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Krzysztof Kozlowski authored
The SPMI controller (PMIC Arbiter) does not use nor allow 'cell-index' property: sc8180x-primus.dtb: spmi@c440000: Unevaluated properties are not allowed ('cell-index' was unexpected) Signed-off-by: -
André Apitzsch authored
This dts adds support for BQ Aquaris M5 (Longcheer L9100) released in 2015. Add a device tree with initial support for: - GPIO keys - Hall sensor - SDHCI - WCNSS (BT/WIFI) - Accelerometer/Magnetometer - Vibrator - Touchscreen - Front flash Reviewed-by:
André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20230827-bq_m5-v4-2-f8435fb8f955@apitzsch.euSigned-off-by:
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André Apitzsch authored
Add a compatible for BQ Aquaris M5 (Longcheer L9100). Reviewed-by:
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Dmitry Baryshkov authored
Enable two PCIe hosts support on Qualcomm SDM845 MTP board. Signed-off-by:
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Dmitry Baryshkov authored
Wire up the Vol- / reset button on Qualcomm SDM845 MTP board. Reviewed-by:
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Dmitry Baryshkov authored
We have switched most of devices to use mbn (squashed) firmware files instead of spit mdt+bNN. Even this DT uses modem.mbn and a630_zap.mbn. Let's switch adsp and cdsp firmware files to use .mbn format too. Reviewed-by:
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Dmitry Baryshkov authored
Specify the variant for the WiFi BDF file, "Qualcomm_sdm845mtp" to ease distinguishing from other (possible) devices using the same board id. For the reference: ath10k_snoc 18800000.wifi: qmi chip_id 0x30214 chip_family 0x4001 board_id 0x3f soc_id 0x40030001 ath10k_snoc 18800000.wifi: qmi fw_version 0x2009856b fw_build_timestamp 2018-07-19 12:28 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.2.0-01387-QCAHLSWMTPLZ-1 ath10k_snoc 18800000.wifi: failed to fetch board data for bus=snoc,qmi-board-id=3f,qmi-chip-id=30214,variant=Qualcomm_sdm845mtp from ath10k/WCN3990/hw1.0/board-2.bin ath10k_snoc 18800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000 ath10k_snoc 18800000.wifi: kconfig debug 1 debugfs 0 tracing 0 dfs 0 testmode 0 ath10k_snoc 18800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790 ath10k_snoc 18800000.wifi: htt-ver 3.53 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1 ath10k_snoc 18800000.wifi: invalid MAC address; choosing random Cc: Kalle Valo <kvalo@kernel.org> Signed-off-by:
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Dmitry Baryshkov authored
Enable the host-cap-8bit quirk on this device. It is required for the WiFi to function properly. Fixes: 022bccb8 ("arm64: dts: sdm845: Add WCN3990 WLAN module device node") Signed-off-by:
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Dmitry Baryshkov authored
The SM8350 HDK uses pmr735a to supply some of the voltages (e.g. to WiFi/BT chip). Declare corresponding regulators together with voltage boundaries. Signed-off-by:
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Dmitry Baryshkov authored
Include configuration for several PMICs presend on the board. Signed-off-by:
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Dmitry Baryshkov authored
On sm8350 QUP18 uses GPIO 68/69, not 58/59. Fix correponding UART18 pinconf configuraion. Fixes: 98374e69 ("arm64: dts: qcom: sm8350: Set up WRAP2 QUPs") Signed-off-by:
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Konrad Dybcio authored
Like on many other platforms, Tama devices utilize lots of GPIO- enabled regulators for the camera sensors. Define them in the DT. Signed-off-by:
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Konrad Dybcio authored
Sony ever so graciously provides GPIO line names in their downstream kernel (though sometimes they are not 100% accurate and you can judge that by simply looking at them and with what drivers they are used). Add these to the Akari, Apollo & Akatsuki DTS-es to better document the hardware. pm8005 and pm8998 config is common for all three boards. Apollo has VIB_LDO_EN (replacing NC) on PMI8998_GPIO_5 Akari and Akatsuki have WLC_EN_N (replacing NC) on PMI8998_GPIO_8 Akari additionally has RSVD(WLC_EN_N) (replacing) on PMI8998_GPIO_11 which sounds a bit like a forgot-to-update-documentation, but maybe it differs between SKUs.. Time will tell, when we get to enabling the wireless charger. Signed-off-by:
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Konrad Dybcio authored
Sony ever so graciously provides GPIO line names in their downstream kernel (though sometimes they are not 100% accurate and you can judge that by simply looking at them and with what drivers they are used). Add these to the Akari, Apollo & Akatsuki DTS-es to better document the hardware. Apollo can be considered the 'base configuration'. Akari brings WLC_INT_N on GPIO_31 over that. Akatsuki & Akari diff: < "NC", > "SAMD_RSTEN_N", < "NC", > "MASTER_RST_N", < "NC", > "DISP_ERR_FG", < "NC", > "SAMD_BOOTL_PIN", < "NC", < "NC", < "NC", /* GPIO_60 */ > "SDM_SWD_CLK", > "SDM_SWD_DAT", > "SAMD_RST", /* GPIO_60 */ < "NC", > "MODE_SEL2", < "NC", > "NFC_ESE_PWR_REQ", < "NC", > "TS_VDDIO_EN", Which makes sense, as Akari and Akatsuki have a wireless charger and Akatsuki also additionally has a super-high-end-complex-for-the-time Samsung OLED display, as opposed to LCDs on the other Tama devices. Signed-off-by:
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David Wronek authored
There are 6 Xiaomi smartphones with the SM7125 SoC: - POCO M2 Pro (gram) - Redmi Note 9S (curtana) - Redmi Note 9 Pro (Global, joyeuse) - Redmi Note 9 Pro (India, curtana) - Redmi Note 9 Pro Max (excalibur) - Redmi Note 10 Lite (curtana) These devices share a common board design (a.k.a miatoll) with only a few differences. Add support for the common board, as well as support for the global Redmi Note 9 Pro. Signed-off-by:
David Wronek <davidwronek@gmail.com> Reviewed-by:
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David Wronek authored
The Snapdragon 720G (sm7125) is software-wise very similar to the Snapdragon 7c with minor differences in clock speeds and as added here, it uses the Kryo 465 instead of Kryo 468. Signed-off-by:
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David Wronek authored
Add support for the RTC which is the same as on other PMICs and add the resin child node to the PM6150 PON device, both disabled by default. Signed-off-by:
Nikita Travkin <nikita@trvn.ru> Reviewed-by:
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David Wronek authored
Document the xiaomi,joyeuse board based on the Qualcomm SM7125 SoC. Reviewed-by:
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Sheng-Liang Pan authored
SKU ID 10: Lazor LTE+Wifi, no-esim (Strapped 0 X 0) SKU ID 15: Limozeen LTE+Wifi, TS, no esim (Strapped 1 X 0) SKU ID 18: Limozeen LTE+Wifi, no TS, no esim (Strapped X 0 0) Even though the "no esim" boards are strapped differently than ones that have an esim, the esim isn't represented in the device tree so the same device tree can be used for LTE w/ esim and LTE w/out esim. add BRD_ID(0, Z, 0) = 10 for new board with ALC5682i-VS Signed-off-by:
Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20230823151005.v6.2.I8f20fdfe34a2e8a38373bbd65587754b324f3dcb@changeidSigned-off-by:
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Sheng-Liang Pan authored
Introduce more sc7180-lazor sku and board version configuration, add no-eSIM SKU 10 for Lazor, no-eSIM SKU 15 and 18 for Limozeen, add new board version 10 for audio codec ALC5682i-VS. Signed-off-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). As a part of this conversion also change the "refgen" name to more correct "rchng". Reviewed-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). As a part of this conversion also add the missing "ref" clock to the PCIe PHY devices. Reviewed-by:
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Dmitry Baryshkov authored
Follow the rest of the platforms and add "ref" clocks to both PCIe PHYs found on the Qualcomm SM8150 platform. Fixes: a1c86c68 ("arm64: dts: qcom: sm8150: Add PCIe nodes") Signed-off-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). While we are at it, rename PHY nodes to `phy@`. Signed-off-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by:
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Dmitry Baryshkov authored
Change the PCIe QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by:
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Krzysztof Kozlowski authored
Qualcomm Embedded USB Debugger (EUD) second port should point to Type-C USB connector. Such connector was defined directly in root node of sc7280.dtsi which is clearly wrong. SC7280 is a chip, so physically it does not have USB Type-C port. The connector is usually accessible through some USB switch or controller. Doug Anderson said that he wasn't ever able to use EUD on Herobrine boards, probably because of invalid or missing DTS description - DTS is saying EUD is on usb_2 node, which is connected to a USB Hub, not to the Type-C port. Correct the EUD/USB connector topology by removing the top-level fake USB connector and EUD port pointing to it, and disabling the incomplete EUD device node. This fixes also dtbs_check warnings: sc7280-herobrine-crd.dtb: connector: ports:port@0: 'reg' is a required property Link: https://lore.kernel.org/all/CAD=FV=Xt26=rBf99mzkAuwwtb2f-jnKtnHaEhXnthz0a5zke4Q@mail.gmail.com/ Fixes: 9ee402cc ("arm64: dts: qcom: sc7280: Fix EUD dt node syntax") Cc: Souradeep Chowdhury <quic_schowdhu@quicinc.com> Cc: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by:
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Konrad Dybcio authored
As pointed out by Richard, I missed a non-continuity in one of the ranges. Fix it. Reported-by:
Richard Acayan <mailingradian@gmail.com> Fixes: b51ee205 ("arm64: dts: qcom: sdm670: Add PDC") Signed-off-by:
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Luca Weiss authored
Since we have those defines available in a header, let's use them everywhere where qcom,vmid property is used. Signed-off-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.comSigned-off-by:
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Andrew Halaney authored
There's an irq hooked up, so let's describe it. Prior to commit 9757300d ("pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets") one would not see the IRQ fire, despite some (invasive) debugging showing that the GPIO was in fact asserted, resulting in the interface staying down. Now that the IRQ is properly routed we can describe it. Signed-off-by:
Andrew Halaney <ahalaney@redhat.com> Reviewed-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by:
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Andrew Halaney authored
There's an irq hooked up, so let's describe it. Prior to commit 9757300d ("pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets") one would not see the IRQ fire, despite some (invasive) debugging showing that the GPIO was in fact asserted, resulting in the interface staying down. Now that the IRQ is properly routed we can describe it. Signed-off-by:
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